A computational device, such as a host system, may include a plurality of interrupt generating agents, such as Input/Output (I/O) controllers. Many I/O controllers are capable of receiving tens or hundreds of thousands of packets (e.g., frames, cells, etc.) per second. I/O controllers, including high-speed I/O controllers (e.g. Gigabit Ethernet MACs), may use interrupts as a method to indicate an I/O event, such as the arrival of a packet. An interrupt service routine associated with a device driver corresponding to the I/O controller may process the I/O events. The processing may include indicating the arrived packet to a protocol stack and then an application that needs the data included in the packet. Examples of high-speed interconnects include Fibre Channel over Ethernet (FCoE), Internet Wide Area RDMA Protocol (iWARP), iSCSI over data center bridge (DCB), etc. An interrupt can take up to 20,000 clock cycles in a virtualized system.
Frequent interrupts may reduce the system performance of the computational device. A high rate of interrupts can increase CPU utilization. As a result, the system may become CPU limited and unable to service the received packets. Furthermore, the amount of processing time available to other parts of the protocol stack, operating system, applications, etc., may be reduced. There may be delays in sending acknowledgments or subsequent packets may be dropped. The overall system throughput and reliability of the system may be reduced and livelock may occur. Livelock refers to a state where the processor bandwidth is completely consumed by interrupt processing and other functions are starved.
When the level of interrupts in a system impacts system performance the level of interrupts from interrupt generating agents may have to be adjusted. Some techniques include polling, which do not use interrupts, to limit interrupt levels in a system. I/O controllers may also use a single interrupt to indicate the occurrence of several interrupt events, such as ten packets being received, to reduce the number of interrupts.
Layered protocol stack architectures permit complex communication processes to be broken down into manageable components, and also permit a degree of modularity in system design. For example, in a network environment a network adapter, such as an Ethernet card or a Fibre Channel card, coupled to a host computer may receive Input/Output (I/O) requests or responses to I/O requests initiated from the host. The host computer operating system may include one or more device drivers to communicate with the network adapter hardware to manage I/O requests transmitted over a network. Data packets received at the network adapter may be stored in an available allocated packet buffer in the host memory. The host computer may also include a transport protocol driver to process the packets received by the network adapter that are stored in the packet buffer, and access I/O commands or data embedded in the packet. The transport protocol driver may include a Transmission Control Protocol (TCP) and Internet Protocol (IP) (TCP/IP) protocol stack to process TCP/IP packets received at the network adapter. Specific computing environments such as, e.g., storage networking environments may implement more complex communication protocols.